dffrst_sc
Project Library Model Name Kind
sca_basic_libraries logic_sc dffrst_sc SystemC Module

Parameters

Name Type Default Description
rst_value T {T}(0) reset value
posedge bool true clock edge for latch

Ports

Name Interface Type Description
d_i sc_core::sc_in T data input
clk_i sc_core::sc_in bool clock
rst_i sc_core::sc_in bool reset
q_o sc_core::sc_out T data output

Description

DFF with reset

Long Description

D Flip-Flop, data is set with rising edge (if parameter posedge is true - otherwise with falling edge) of clock and when enable is true. Reset is high active, reset value is set using a parameter